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| NTE1858 Integrated Circuit Vertical Deflection Circuit Description: The NTE1858 is a full performance and very efficient vertical deflection circuit in an 11-Lead SIP type package intended for direct drive of a TV picture tube in Color and B & W television as well as in Monitor and Data Displays. Features: D Ramp Generator D Independent Amplitude Adjustment D Buffer Stage D Power Amplifier D Flyback Generator D Internal Reference Voltage D Thermal Protection Absolute Maximum Ratings: (TA = +25C unless otherwise specified) Supply Voltage, VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35V Flyback Peak Voltage, V1, V2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65V Trigger Input Voltage, V3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V Amplifier Input Voltage, V9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND to VS V Output Peak to Peak Current, IO Non-Repetitive, t = 2ms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6A t > 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4A Pin11 DC Current (V1 < V10), I11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA Pin11 Peak-to-Peak Current (t8y < 1.5ms) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3A Total Power Dissipation (TA = +60C), Ptot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30W Junction Temperature Range, Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +150C Ambient Temperature Range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to +70C Storage Temperature Range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 to +150C Thermal Resistance, Junction-to-Tab, Rth(j-tab) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3C/W Thermal Resistance, Junction-to-Ambient, Rth(j-amb) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40C/W DC Electrical Characteristics: (VS = 35V, TA = 25C unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Quiescent Current (Pin2) Quiescent Current (Pin10) Ramp Generator Bias Current Ramp Generator Current Ramp Generator Linearity Quiescent Output Voltage I2 I10 -I7 -I7 dI7/I7 V1 I1 = 0, I11 = 0 - 16 36 I1 = 0, I11 = 0 - 15 30 V7 = 0 - - 0.6 V7 = 0, -I4 = 20A 18.6 20 21.6 V6 = 0 to 15V, -I4 = 20A - 0.2 1 Ra = 30k, Rb = 10k, 17.0 17.8 18.6 VS = 35V Ra = 6.8k, Rb = 10k, 7.2 7.6 7.8 VS = 15V I1 = 0.5A - 0.5 1 I1 = 1.2A - 1 1.4 -I1 = 0.5A - 1.1 1.6 -I1 = 1.2A - 1.6 2.2 -I4 = 20A 6.3 6.6 6.9 VS = 10V to 35V - 1 2 - 1.5 2 Unit mA mA A A % V V V V V V V mV/V mV/A V V V dB V V V A s Out Saturation Voltage to GND Out Saturation Voltage to VS Reference Voltage Reference Voltage Drift versus VS Reference Voltage Drift versus I4 Internal Reference Voltage Diode Forward Voltage Diode Forward Voltage Output Stage Open Loop Gain Saturation Voltage (V10-11) Scanning Voltage (Pin11) Trigger Input Threshold Trigger Input Bias Current Trigger Input Width V1L V1H V4 dV4/dVS dV4/dI4 I4 = 10A to 30A Vr VD11-10 VD1-2 GV VIS V11 V3 I3 t3 IO = 1.2A IO = 1.2A f = 100HZ -I11 = 1.2A I11 = 20mA Note 1 VIN = V3 * 0.2V Note 2 4.26 4.40 4.54 - 2.2 3.0 - 2.2 3.0 - 60 - - 1.5 2.5 - 1.7 3.0 2.6 3.0 3.4 - - 30 20 60 Th AC Electrical Characteristics: (VS = 24V, TA = 25C unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Operating Supply Range Peak-to-Peak Operating Current Range Supply Current Flyback Voltage Sawtooth Pedestal Voltage Junction Temperature for Thermal Shutdown VS II IS V1 V8 Tjs 10 0.4 - - - - - - 31.5 51 1.85 145 30 2.5 - - - - Unit V A mA V V C Iy = 2.4APP Iy = 2.4APP Note 1:The trigger input circuit can accept, optionally, positive and negative going input pulses. Block Diagram 10 2 11 Voltage Regulator R3 Ramp Generator Clock Pulse Flyback Generator 3 Trigger Input + Power Amp - 1 Buffer Stage Thermal Protection 4 7 8 9 6 Pin Connection Diagram (Front View) 11 10 9 8 7 6 5 4 3 2 1 Flyback Generator VS Inverting Input Buffer Output Ramp Generator GND N.C. Height Adjust Trigger Input Output Stage VS Power Output .791 (20.1) .196 (4.99) .062 (1.52) Note .110 (2.79) .150 (3.81) Dia Max .689 (17.5) .696 (17.68) 1 11 .858 (21.79) .067 (1.7) .008 (.203) .200 (5.08) .169 (4.29) NOTE: Tab connected o Pin6 |
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